ltc6910-2 1 69102i , ltc and lt are registered trademarks of linear technology corporation. n 3-bit digital gain control (0, 1, 2, 4, 8, 16, 32 and 64v/v) n 8-pin tsot-23 package n rail-to-rail input range n rail-to-rail output swing n single or dual supply: 2.7v to 10.5v total n 13mhz gain bandwidth product n 9nv/ ? hz input noise at gain of 64 n 120db total system dynamic range n input offset voltage: 3mv (gain = 1) n input offset voltage: 2mv (gain = 8) digitally controlled programmable gain amplifier in sot-23 april 2003 n data acquisition systems n dynamic gain changing n automatic ranging circuits n automatic gain control descriptio u features applicatio s u typical applicatio u information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. final electrical specifications the ltc 6910-2 is a low noise digitally programmable gain amplifier (pga) that is easy to use and occupies very little pc board space. the gain is adjustable using a 3-bit digital input to select inverting gains of 0, 1, 2, 4, 8, 16, 32 and 64v/v. the ltc6910-2 is an inverting amplifier with a rail-to-rail output. when operated with unity gain, the ltc6910-2 will also process rail-to-rail input signals. a half-supply reference generated internally at the agnd pin supports single power supply applications. operating from single or split supplies from 2.7v to 10.5v, the ltc6910-2 is offered in an 8-lead tsot-23 package. for other gain options, see the ltc6910-1 and ltc6910-3. 2 1 3 v in v out = gain ?v in agnd 1 f or larger pin 2 (agnd) provides built-in half-supply reference with internal resistance of 5k. agnd can also be driven by a system analog ground reference near half supply 69102 ta01 5 4 ltc6910-2 6 8 v + 2.7v to 10.5v 0.1 f g2 g1 g0 7 g2 0 0 0 0 1 1 1 1 gain 0 ? ? ? ? ?6 ?2 ?4 g1 0 0 1 1 0 0 1 1 g0 0 1 0 1 0 1 0 1 single supply programmable amplifier frequency response frequency (hz) 10 gain (db) 30 50 0 20 40 100 1k 100k 1m 10m 69102 ta02 ?0 10k v s = 5v v in = 10mv rms gain of 64 gain of 32 gain of 16 gain of 4 gain of 8 gain of 2 gain of 1
ltc6910-2 2 69102i total supply voltage (v+ to vC) ............................. 11v input current ..................................................... 25ma operating temperature range (note 2) ltc6910-2c ....................................... C 40 c to 85 c ltc6910-2i ........................................ C 40 c to 85 c specified temperature range (note 3) ltc6910-2c ....................................... C 40 c to 85 c ltc6910-2i ........................................ C 40 c to 85 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c order part number t jmax = 150 c, q ja = 230 c/w ltc6910-2cts8 ltc6910-2its8 (note 1) the l denotes the specifications that apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v s = 5v, agnd = 2.5v, gain = 1 (digital inputs 001), r l = 10k to midsupply point, unless otherwise noted. parameter conditions min typ max units voltage gain (note 4) v s = 2.7v, gain = 1, r l = 10k l C 0.06 0 0.08 db v s = 2.7v, gain = 1, r l = 500 w l C 0.1 C 0.02 0.06 db v s = 2.7v, gain = 2, r l = 10k l 5.96 6.02 6.10 db v s = 2.7v, gain = 4, r l = 10k l 11.9 12.02 12.12 db v s = 2.7v, gain = 8, r l = 10k l 17.80 17.98 18.15 db v s = 2.7v, gain = 8, r l = 500 w l 17.65 17.95 18.15 db v s = 2.7v, gain = 16, r l = 10k l 23.75 24 24.2 db v s = 2.7v, gain = 32, r l = 10k l 29.7 30 30.2 db v s = 2.7v, gain = 64, r l = 10k l 35.3 35.75 36.2 db v s = 2.7v, gain = 64, r l = 500 w l 34.2 35.30 36.2 db ts8 part marking* ltacq absolute axi u rati gs w ww u package/order i for atio uu w electrical characteristics *the temperature grades are identified by a label on the shipping container. consult ltc marketing for parts specified with wider operating temperature ranges or other gain ranges. out 1 agnd 2 in 3 v 4 8 v + 7 g2 6 g1 5 g0 top view ts8 package 8-lead plastic tsot-23 table 1 nominal nominal input digital inputs voltage gain dual 5v single 5v single 3v impedance g2 g1 g0 volts/volt (db) supply supply supply (k w ) 0 0 0 0 C120 10 5 3 (open) 0 0 1 C1 0 10 5 3 10 0 1 0 C2 6 5 2.5 1.5 5 0 1 1 C4 12 2.5 1.25 0.75 2.5 1 0 0 C8 18.06 1.25 0.625 0.375 1.25 1 0 1 C16 24.08 0.625 0.313 0.188 1.25 1 1 0 C32 30.1 0.313 0.156 0.094 1.25 1 1 1 C64 36.12 0.156 0.078 0.047 1.25 gai setti gs a d properties u uu nominal linear input range (v p-p ), r l = 10k
ltc6910-2 3 69102i parameter conditions min typ max units voltage gain (note 4) the l denotes the specifications that apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v s = 5v, agnd = 2.5v, gain = 1 (digital inputs 001), r l = 10k to midsupply point, unless otherwise noted. electrical characteristics v s = 5v, gain = 1, r l = 10k l C 0.06 0 0.08 db v s = 5v, gain = 1, r l = 500 w l C 0.1 C 0.01 0.08 db v s = 5v, gain = 2, r l = 10k l 5.96 6.02 6.10 db v s = 5v, gain = 4, r l = 10k l 11.85 12.02 12.15 db v s = 5v, gain = 8, r l = 10k l 17.85 18.0 18.15 db v s = 5v, gain = 8, r l = 500 w l 17.65 17.9 18.15 db v s = 5v, gain = 16, r l = 10k l 23.85 24 24.15 db v s = 5v, gain = 32, r l = 10k l 29.7 30 30.2 db v s = 5v, gain = 64, r l = 10k l 35.6 35.9 36.2 db v s = 5v, gain = 64, r l = 500 w l 34.8 35.5 36.0 db v s = 5v, gain = 1, r l = 10k l C 0.05 0 0.07 db v s = 5v, gain = 1, r l = 500 w l C 0.1 C 0.01 0.08 db v s = 5v, gain = 2, r l = 10k l 5.96 6.02 6.10 db v s = 5v, gain = 4, r l = 10k l 11.9 12.02 12.15 db v s = 5v, gain = 8, r l = 10k l 17.85 18.00 18.15 db v s = 5v, gain = 8, r l = 500 w l 17.80 17.95 18.10 db v s = 5v, gain = 16, r l = 10k l 23.85 24 24.15 db v s = 5v, gain = 32, r l = 10k l 29.85 30 30.15 db v s = 5v, gain = 64, r l = 10k l 35.7 35.95 36.2 db v s = 5v, gain = 64, r l = 500 w l 35.2 35.80 36.2 db signal attenuation at gain = 0 setting gain = 0 (digital inputs 000), f = 20khz l C 122 db total supply voltage l 2.7 10.5 v supply current v s = 2.7v, v in = 1.35v l 23 ma v s = 5v, v in = 2.5v l 2.4 3.5 ma v s = 5v, v in = 0v, pins 5, 6, 7 = C 5v or 5v l 3 4.5 ma v s = 5v, v in = 0v, pins 5 = 4.5v, pins 6, 7 = 0.5v (note 5) l 3.5 4.9 ma output voltage swing low (note 6) v s = 2.7v, r l = 10k to midsupply point l 12 30 mv v s = 2.7v, r l = 500 w to midsupply point l 50 100 mv v s = 5v, r l = 10k to midsupply point l 20 40 mv v s = 5v, r l = 500 w to midsupply point l 90 160 mv v s = 5v, r l = 10k to 0v l 30 50 mv v s = 5v, r l = 500 w to 0v l 180 250 mv output voltage swing high (note 6) v s = 2.7v, r l = 10k to midsupply point l 10 20 mv v s = 2.7v, r l = 500 w to midsupply point l 50 80 mv v s = 5v, r l = 10k to midsupply point l 10 30 mv v s = 5v, r l = 500 w to midsupply point l 80 150 mv v s = 5v, r l = 10k to 0v l 20 40 mv v s = 5v, r l = 500 w to 0v l 180 250 mv output short-circuit current (note 7) v s = 2.7v 27 ma v s = 5v 35 ma agnd open-circuit voltage v s = 5v l 2.45 2.5 2.55 v agnd (common mode) input voltage range v s = 2.7v l 0.85 1.55 v (note 8) v s = 5v l 0.7 3.60 v v s = 5v l C 4.3 3.40 v
ltc6910-2 4 69102i the l denotes the specifications that apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v s = 5v, agnd = 2.5v, gain = 1 (digital inputs 001), r l = 10k to midsupply point, unless otherwise noted. electrical characteristics parameter conditions min typ max units agnd rejection (i.e., common mode rejection v s = 2.7v, v agnd = 1.1v to 1.6v l 55 80 db or cmrr) v s = 5v, v agnd = C 2.5 to 2.5 l 55 75 db power supply rejection ratio (psrr) v s = 2.7v to 5v l 60 80 db offset voltage magnitude (referred to input) gain = 1 l 315 mv gain = 8 l 210 mv dc input resistance (note 9) dc v in = 0v gain = 0 >100 m w gain = 1 l 10 k w gain = 2 l 5k w gain = 4 l 2.5 k w gain = 8, 16, 32, 64 l 1.25 k w dc small-signal output resistance gain = 0 0.4 w gain = 1 0.7 w gain = 2 1 w gain = 4 1.6 w gain = 8 2.8 w gain = 16 5 w gain = 32 10 w gain = 64 20 w gain-bandwidth product gain = 64, f in = 200khz 9 13 16 mhz l 7 19 mhz slew rate v s = 5v, v out = 2.8v p-p 12 v/ m s v s = 5v, v out = 2.8v p-p 16 v/ m s wideband noise (referred to input) f = 1khz to 200khz gain = 0 output noise 3.7 m v rms gain = 1 10.3 m v rms gain = 2 7 m v rms gain = 4 5.3 m v rms gain = 8 4.4 m v rms gain = 16 4.2 m v rms gain = 32 4 m v rms gain = 64 3.6 m v rms voltage noise density (referred to input) f = 50khz gain = 1 25 nv/ ? hz gain = 2 17 nv/ ? hz gain = 4 13 nv/ ? hz gain = 8 11 nv/ ? hz gain = 16 9.9 nv/ ? hz gain = 32 9.6 nv/ ? hz gain = 64 9.1 nv/ ? hz total harmonic distortion gain = 8, f in = 10khz, v out = 1v rms C90 db 0.003 % gain = 8, f in = 100khz, v out = 1v rms C77 db 0.014 %
ltc6910-2 5 69102i note 1: absolute maximum ratings are those values beyond which the life of the device may be impaired. note 2: the ltc6910-2c and ltc6910-2i are guaranteed functional over the operating temperature range of C 40 c to 85 c. note 3: the ltc6910-2c is guaranteed to meet specified performance from 0 c to 70 c. the ltc6910-2c is designed, characterized and expected to meet specified performance from C 40 c to 85 c but is not tested or qa sampled at these temperatures. ltc6910-2i is guaranteed to meet specified performance from C 40 c to 85 c. note 4: gain is measured with a dc large-signal test using an output excursion between approximately C 40% and 40% of half supply. note 5: operating all three digital inputs at 0.5v causes supply current to increase typically 0.1ma from this specification. note 6: output voltage swings are measured as differences between the output and the respective supply rail. note 7: extended operation with output shorted may cause the junction temperature to exceed the 150 c limit and is not recommended. note 8: open-loop gain of the internal op amp falls by approximately 15db at the limits of the agnd voltage range. note 9: input resistance can vary by approximately 30%. out (pin 1): analog output. this is the output of an internal operational amplifier and swings to near the power supply rails (v + and v C ) as specified in the electrical characteristics table. the internal op amp remains active at all times, including the zero gain setting (digital input 000). as with other amplifier circuits, loading the output as lightly as possible will minimize signal distortion and gain error. the electrical characteristics table shows perfor- mance at output currents up to 10ma. currents above 10ma are possible but current-limiting circuitry will begin to affect amplifier performance at approximately 20ma. long-term operation above 20ma output is not recom- mended. do not exceed maximum junction temperature of 150 c. the output will drive capacitive loads up to 50pf. capacitances higher than 50pf should be isolated by a series resistor to preserve ac stability. agnd (pin 2): analog ground. the agnd pin is at the midpoint of an internal resistive voltage divider, develop- ing a potential halfway between the v + and v C pins, with an equivalent series resistance to the pin of nominally 5k w (figure 3). agnd is also the noninverting input of the internal op amp, which makes it the ground reference voltage for the in and out pins. because of this, very clean grounding is important, including an analog ground plane surrounding the package. for dual supply operation, this ground plane should be at zero volts and the agnd pin should connect directly to the ground plane (figure 1). for single supply operation, in contrast, the v C pin typically connects to system signal ground. the ground plane should then tie to v C and the agnd pin should be ac- bypassed to the ground plane (figure 2) by at least a 1 m f high quality capacitor. in noise-sensitive single-supply applications, it is impor- tant to ac-bypass the agnd pin. otherwise wideband noise will enter the signal path from the internal voltage- divider resistors that set the dc voltage on agnd in single- supply applications. this noise can reduce snr by 3db at high gain settings. the resistors present a thvenin equiva- lent of approximately 5k to the agnd pin. an external capacitor from agnd to the ground plane, whose imped- ance is well below 5k at frequencies of interest, will suppress this noise. a 1 m f high quality capacitor is effec- tive for frequencies down to 1khz. larger capacitors extend this suppression to proportionately lower frequen- cies. this issue does not arise in dual supply applications because agnd goes directly to ground. uu u pi fu ctio s digital input high voltage v s = 2.7v l 2.43 v v s = 5v l 4.5 v v s = 5v l 4.5 v digital input low voltage v s = 2.7v l 0.27 v v s = 5v l 0.5 v v s = 5v l 0.5 v the l denotes the specifications that apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v s = 5v, agnd = 2.5v, gain = 1 (digital inputs 001), r l = 10k to midsupply point, unless otherwise noted. electrical characteristics parameter conditions min typ max units
ltc6910-2 6 69102i + input r array feedback r array v 69102 f03 out v + 10k mos-input op amp in agnd 10k 2 v 4 v + 8 g1 g2 g0 1 3 cmos logic 6 7 5 figure 3. block diagram uu u pi fu ctio s ltc6910-2 digital ground plane (if any) analog ground plane 1 single-point system ground 234 69102 f01 8765 0.1 f v + 0.1 f v ltc6910-2 digital ground plane (if any) analog ground plane 1 single-point system ground 234 reference v + 2 69102 f02 8765 0.1 f v + 1 f figure 1. dual supply ground plane connection figure 2. single supply ground plane connection in (pin 3): analog input. the input signal to the amplifier in the ltc6910-2 is the voltage difference between the in and agnd pins. the in pin connects internally to a digitally controlled resistance whose other end is a current sum- ming point at the same potential as the agnd pin (fig- ure 3). at unity gain (digital input 001), the value of this input resistance is approximately 10k w and the in voltage range is rail-to-rail (v + to v C ). at gain settings above unity (digital input 010 or higher), the input resistance falls, to nominally 1.25k w at gain settings of 8v/v or greater (digital input 100 or greater). also, the linear input range falls in inverse proportion to gain. (the higher gains are designed to boost lower level signals with good noise performance.) in the zero gain state (digital input 000), analog switches disconnect the in pin internally and this pin presents a very high input resistance. the input may vary from rail to rail in the zero gain setting but the output is insensitive to it and remains at the agnd potential. table 1 summarizes the ltc6910-2s behavior for all gain codes. circuitry driving the in pin must consider the ltc6910-2s input resistance and the varia- tion of this resistance when used at multiple gain settings. signal sources with significant output resistance may introduce a gain error as the sources output resistance and the ltc6910-2s input resistance form a voltage divider. this is especially true at the higher gain settings where the input resistance is lowest. in single supply voltage applications at elevated gain settings (digital input 010 or higher), it is important to remember that the ltc6910-2s dc ground reference for both input and output is agnd, not v C . with increasing gains, the ltc6910-2s input voltage range for unclipped output is no longer rail-to-rail but shrinks toward agnd.
ltc6910-2 7 69102i uu u pi fu ctio s the out pin also swings positive or negative with respect to agnd. at unity gain (digital input 001), both in and out voltages can swing from rail to rail (table 1). v C , v + (pins 4, 8): power supply pins. the v + and v C pins should be bypassed with 0.1 m f capacitors to an adequate analog ground plane using the shortest possible wiring. electrically clean supplies and a low impedance ground are important for the high dynamic range available from the ltc6910-2 (see further details under agnd). low noise linear power supplies are recommended. switching power supplies require special care to prevent switching noise coupling into the signal path, reducing dynamic range. g0, g1, g2 (pins 5, 6, 7): cmos-level digital gain- control inputs. g2 is the most significant bit (msb). these pins control the voltage gain from in to out pins. in the ltc6910-2, the voltage gain range is 0 to 64v/v in eight discrete values 0, 1, 2, 4, 8, 16, 32, 64, set respectively by digital inputs 000 through 111 (or in decimal form, 0 through 7). digital input code 000 causes a zero gain with very low output noise. in this zero gain state the in pin is disconnected internally, but the out pin remains active and forced by the internal op amp to the voltage present on the agnd pin. note that the voltage gain is inverting: out and in pins always swing on opposite sides of the agnd potential. the g pins are high impedance cmos logic inputs and must be connected (they will float to unpredictable voltages if open circuited). table 1 sum- marizes the effects of the g-pin code. functional description the ltc6910-2 is a small outline, wideband inverting dc amplifier whose voltage gain is digitally programmable. it delivers a choice of eight voltage gains, controlled by the 3-bit digital inputs to the g pins, which accept cmos logic levels. the gain code is always monotonic; an increase in the 3-bit binary number (g2 g1 g0) causes an increase in the gain. ltc6910-2s nominal gain magnitudes are 0, 1, 2, 4, 8, 16, 32 and 64volts/volt. at nonzero gains, the signal bandwidth varies roughly inversely with gain, so that the product of gain and bandwidth (to C3db rolloff) is typically 13mhz. gain control within the amplifier occurs by switching resistors from a matched array in or out of a closed-loop op amp circuit using mos analog switches (figure 3). digital control logic levels for the ltc6910-2 digital gain control inputs (pins 5, 6, 7) are nominally rail-to-rail cmos. logic 1 is v + , logic 0 is v C or alternatively 0v when using 5v supplies. the part is tested with the values listed in the electrical characteristics table (digital input high and low volt- ages), which are 10% and 90% of full excursion on the inputs. that is, the tested logic levels are 1.08v with 1.35v supplies, 2v with 2.5v supplies (equivalently, 0.5v and 4.5v levels with 0v and 5v supply rails), and 0.5v and 4.5v logic levels at 5v supplies. construction and instrumentation cautions electrically clean construction is important in applications seeking the full dynamic range of the ltc6910-2 amplifier. short, direct wiring will minimize parasitic capacitance and inductance. high quality supply bypass capacitors of 0.1 m f near the chip provide good decoupling from a clean, low inductance power source. but several cm of wire (i.e., a few microhenrys of inductance) from the power sup- plies, unless decoupled by substantial capacitance ( 3 10 m f) near the chip, can cause a high-q lc resonance in the hundreds of khz in the chips supplies or ground reference. this may impair circuit performance at those frequencies. a compact, carefully laid out printed circuit board with a good ground plane makes a significant difference in distortion minimizing. finally, equipment to measure amplifier performance can itself introduce dis- tortion or noise floors. checking for these limits with a wire replacing the chip is a prudent routine procedure. applicatio s i for atio wu uu
ltc6910-2 8 69102i linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear.com ? linear technology corporation 2003 lt/tp 0403 1k ? printed in usa related parts u package descriptio ts8 package 8-lead plastic tsot-23 (reference ltc dwg # 05-08-1637) typical applicatio u expanding an adcs dynamic range 5 1 499 270pf ltc1864 3 v in agnd gain control 1 f 16102 ta03 6 4 ltc6910-2 7 8 5v 0.1 f 2 1 f adc control v ref in + in gnd 5v ltc6910-2 (in tsot-23 package) compactly adds 36db of input gain range to the ltc1864 (in msop 8-pin package). single 5v supply v cc sck sdo conv 1.50 ?1.75 (note 4) 2.80 bsc 0.22 ?0.36 8 plcs (note 3) datum ? 0.09 ?0.20 (note 3) ts8 tsot-23 0802 2.90 bsc (note 4) 0.65 bsc 1.95 bsc 0.80 ?0.90 1.00 max 0.01 ?0.10 0.20 bsc 0.30 ?0.50 ref pin one id note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 3.85 max 0.52 max 0.65 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 part number description comments lt ? 1228 100mhz gain controlled transconductance amplifier differential input, continuous analog gain control lt1251/lt1256 40mhz video fader and gain controlled amplifier two input, one output, continuous analog gain control ltc1564 10khz to 150khz digitally controlled filter and pga continuous time, low noise 8th order filter and 4-bit pga ltc6910-1 digitally controlled pga sot-23, gains 0, 1, 2, 5, 10, 20, 50, 100v/v ltc6910-3 digitally controlled pga sot-23, gains 0, 1, 2, 3, 4, 5, 6, 7v/v
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